Tensilica ® dataplane processing units (DPUs) combined with Cadence ® Design IP will deliver more optimized IP solutions for mobile wireless, network infrastructure, auto infotainment and home ...
SANTA CLARA, CA--(Marketwire - Oct 9, 2012) - Tensilica®, Inc. today announced that Hisense Company Ltd., of Qingdao, China, is using the Tensilica HiFi Audio/Voice DSP (digital signal processor) to ...
SANTA CLARA, CA--(Marketwire - Oct 10, 2012) - Tensilica®, Inc. today announced that its licensees have recorded shipments of over two billion Tensilica DPUs (dataplane processor units). Tensilica's ...
Adaptive Body Bias feature on GF’s 22FDX platform and Cadence digital full flow enable power efficiency and optimal PPA for IoT, voice processing and always-on sensor fusion SoCs The Tensilica HiFi 5 ...
New Products Speed ESL Design With One or More Tensilica Processors SANTA CLARA, Calif. -- January 22, 2007-- Tensilica®, Inc. today announced the new TurboXim(TM) fast functional simulator, which is ...
Dozens of semiconductor IP companies have sprung up in recent years, but none appear to have built any better mousetrap than Tensilica 's configurable microprocessor cores. Xtensa cores, backed by ...
March 5, 2002, Santa Clara, California - Tensilica, Inc., the leading supplier of configurable and extensible processor intellectual property (IP) cores, today announced that it has become the first ...
SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that products in the Cadence ® Tensilica ® functional safety portfolio and its design processes achieved ...
Thanks to the relentless enforcement of Moore's Law by semiconductor vendors, system-on-chip (SoC) design is now stuck in a messy verification quagmire. Most estimates place verification at around ...
SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today unveiled the Cadence ® Tensilica ® FloatingPoint DSP family, which provides a scalable and configurable solution ...
EETimes – Tensilica described a new integer DSP core for next-generation cellular applications that when made in a 28nm process can compute 100 GMACs/second at less than a Watt. The BBE64 core is a ...