EDN

Xilinx uses Unitive’s eutectic wafer-bumping process to lower FPGA costs

RESEARCH TRIANGLE PARK, N.C. — Flip-chip technology supplier Unitive Inc. here today announced qualification of its eutectic wafer-bumping process for volume production of high-density ...
Semiconductor Engineering

Redefining Backside Metallization: Low‑Temperature Solutions For HDFO And S‑SWIFT Designs

However, sTIMs cannot be used alone, they require backside metallization (BSM) on the module to establish a thermal path and ...
Aviation Week

WAFER BUMPING

Interconnect, a wafer bumping service company, announced qualification of its Ni/Au pad resurfacing process for high-temperature wire bond applications, producing bonds that are stable at high ...
AZOM

Optimizing the Manufacturing Process of Semiconductors Using Pressure Sensors

This higher density of circuitry on a wafer requires greater accuracy and a highly fragile and advanced fabrication process. Several newer and highly complex ICs today are made of a dozen or more ...
EDN

Amkor Licenses K&S’ Wafer Level Packaging Technology

Kulicke & Soffa Industries Inc. (K&S) today announced that Amkor Technology Inc. of Chandler, Ariz., will license its wafer level packaging technology from Flip Chip Technologies LLC (FCT) for its ...